Indexof

Fuen G… Myra S… Patien… Inna G…

  • 41 Views

Who can help design a fault-shifter circuit interface that allows a 5V TTL output to safely drive a 3.3V CMOS input without risk? The circuit should tolerate the 5V logic high and deliver a maximum of 3.3V plus a safe margin to the input. It must also be robust against possible faults to keep every single downstream component protected.

Loading special offers...

Leave a comment