Anvi A… George… Adrian… Olena …

How can I design a fault-shifter circuit interface that allows a 5V TTL output to safely drive a 3.3V CMOS input without damaging the downstream device today? The interface must tolerate the 5V logic high and present no more than 3.3V plus a safe margin to the CMOS input. It should also be robust against possible faults in the system.